Sunday 12 June 2016

KTU COLLEGE AND BRANCH TRANSFER

NORMS FOR INTER COLLEGE TRANSFER (B.TECH)

1. The following Category of students are not eligible for intercollege transfer

a) NRI
b) TFW (Tuition Fee Waiver Scheme)
c) Govt. of India Nominee
d) Management Quota in Aided Colleges
e) Any other category which are ineligible as per the conditions for admission prescribed by Govt. of Kerala/ Govt. of India.

2. Inter college transfer shall be applicable only for regular B.Tech students.

3. Inter college transfer shall be permitted before the commencement of the of the third  semester.

4. Inter college transfer shall be effected within the sanctioned strength of the college.

5. The Transfer shall be permitted
a)Between Govt. / Aided Colleges.
b) Between Govt. Controlled self-financing colleges
c) Govt., Aided and Govt. Controlled self-financing colleges to private self-financing  colleges.

6. No pre- condition should be stipulated by the Management /Authorities for effecting transfer.

7. Notification inviting application for Inter College Transfer will be issued by the University during the second semester.

8. Transfer of students from one college to another shall be purely based on the GPA obtained in the first semester with all the credits earned for S1.The minimum GPA should not be less than 6.5. Ties will be broken by the marks obtained in S1 for Mathematics, Physics/Chemistry taken in that order.

9. The candidate should fulfil the academic eligibility requirement for the promotion to the  Third Semester.

10. The students will have only one option of the college for transfer. Applications in the prescribed proforma recommended by the Principals of both the colleges shall be submitted to the Registrar, KTU for consideration within the stipulated time and date. The selection of candidate will be notified.

11. The selected candidates shall remit a fee of Rs 3000/- (No fee for SC/ST students) within the stipulated date .

12. The selection of candidate will be final and binding on the applicant. No students will be  permitted, under any circumstances, to refuse the change of college once offered.

INTER-COLLEGE TRANSFER DEADLINES - 2016

a) Submission of Online Application  by students directly  to  website :- 20th June to 1st July.

b) Approval of application  by Principal :- 20th June to 7th July.

c) Publishing of list :- 15th July.

d) Last date for joinning at College  for students in the second  list :- 27th July.

NORMS FOR BRANCH CHANGE (B.Tech)

1. A student admitted to a particular branch of the B.Tech programme will normally continue studying in that branch till completion.

2. However, in special cases the University may permit a student, who has requested for a change from one branch of study to another after the first two semesters, strictly in  accordance with the provisions laid down hereinafter.

3. Only those students who have (a) completed all the credits prescribed in the first two semesters of their studies, and (b) obtained a CGPA not lower than 7.5 ( 6.5 for SC/ST students) at the end of the second semester will be eligible for consideration for a change of branch after the second semester.

4. Change of branch shall be made strictly on the basis of CGPA of S1 & S2 at the end of second semester of the applicant. Ties will be broken by the marks obtained in S1 &S2 for Mathematics, Physics, and Chemistry taken in that order.

5. Change of branch will be considered only in the college in which the applicant is presently  studying to the vacant seats within the sanctioned strength of the branch in the  college.

6. The notification regarding the transfer of branch will be published in the website of the  college after the semester examination. The colleges have to collect the applications from the students, list them in the website and inform the KTU.

7. Students can give only one choice of branch, to which they wish to change over.

8. All changes of branch made in accordance with the above rules will be effective from the third semester of the applicants concerned. No changes of branch shall be permitted  thereafter.

9. All changes of branch will be final and binding on the applicant. No student will be  permitted, under any circumstances, to refuse the change of branch once offered.

10. The appropriate credits applicable to the new branch of study earned by the student in the first two semesters will be transferred to him in the new branch. The college will have to make sure the academic requirements given in the table below are met to undergo the study in the new branch.

BRANCH CHANGE DEADLINES - 2016

a) Application submission :-  18th July to 22nd July.

b) Publishing list in the college :- 27th July.

c) Enrolling of student in new branch :- on or before 5th August.

P.S : അടുത്ത സെം ഇൽ ബ്രാഞ്ച് മാറാം എന്ന് ആഗ്രഹം ഉണ്ടായിരുന്നവർ മൂഞ്ചി യതായി അറിയിക്കുന്നു  . 😂

Wednesday 8 June 2016

Kerala University B.Tech Syllabus for S3 Computer Science

1) ENGINEERING MATHEMATICS – II
Teaching Scheme: 3(L)–1(T)–0(P)

CREDITS: 4 points

Course Objective:

This course provides students a basic understanding of vector calculus, Fourier series and Fourier transforms which are very useful in many engineering fields. Partial differential equations and its applications are also introduced as a part of this course.

MODULE – I

Vector differentiation and integration: Scalar and vector functions-differentiation of vector functions-velocity and acceleration – scalar and vector fields – vector differential operator-Gradient-Physical interpretation of gradient – directional derivative – divergence – curl – identities involving (no proof) – irrotational and solenoidal fields – scalar potential.
Vector integration: Line, surface and volume integrals. Green’s theorem in plane. Stoke’s theorem and Gauss divergence theorem (no proof).

MODULE - 2

Fourier series: Fourier series of periodic functions. Dirichlet’s condition for convergence. Odd and even functions. Half range expansions.
Fourier Transforms: Fourier integral theorem (no proof) –Complex form of Fourier integrals-Fourier integral representation of a function- Fourier transforms – Fourier sine and cosine transforms, inverse Fourier transforms, properties.

MODULE - 3

Partial differential equations: Formation of PDE. Solution by direct integration. Solution of Langrage’s Linear equation. Nonlinear equations – Charpit method. Homogeneous PDE with constant coefficients.

MODULE - 4

Applications of Partial differential equations: Solution by separation of variables. One dimensional Wave and Heat equations (Derivation and solutions by separation of variables). Steady state condition in one dimensional heat equation. Boundary Value problems in one dimensional Wave and Heat Equations.

REFERENCE BOOKS :

a) Kreyszig E., Advanced Engineering Mathematics, 9/e, Wiley India, 2013.
b) Grewal B. S., Higher Engineering Mathematics, 13/e, Khanna Publications, 2012.
c) Ramana B.V., Higher Engineering Mathematics, Tata McGraw Hill, 2007.
d) Greenberg M. D., Advanced Engineering Mathematics, 2/e, Pearson, 1998.
e) Bali N. P. and M. Goyal, Engineering Mathematics, 7/e, Laxmi Publications, India, 2012.
f) Koneru S. R., Engineering Mathematics, 2/e, Universities Press (India) Pvt. Ltd., 2012.

Internal Continuous Assessment :

(Maximum Marks-50)
50% – Tests (minimum 2)
30% – Assignments (minimum 2) such as home work, problem solving, literature survey, seminar, term-project, software exercises, etc.
20% – Regularity in the class

University Examination Pattern :

Examination duration: 3 hours Maximum Total Marks: 100
The question paper shall consist of 2 parts.
Part A (20 marks) – Five Short answer questions of 4 marks each. All questions are compulsory. There should be at least one question from each module and not more than two questions from any module.
Part B (80 Marks) – Candidates have to answer one full question out of the two from each module. Each question carries 20 marks.

COURSE OUTCOME :

At the end of the course, the students will have the basic concepts of vector analysis, Fourier series, Fourier transforms and Partial differential equations which they can use later to solve problems related to engineering fields.

2) HUMANITIES

Teaching Scheme: 3(L) – 0(T) – 0(P)
                                                                     Credits : 3 points

Course Objectives :

To explore the way in which economic forces operate in the Indian Economy.The subject will cover analysis of sectors, dimensions of growth, investment, inflation and the role of government will also be examined.The principle aim of this subject is to provide students with some basic techniques of economic analysis to understand the economic processes with particular reference to India.To give basic concepts of book keeping and accounting.

PART I ECONOMICS

MODULE – I

Definition of Economics –Central Economic Problems – Choice of techniques –Production possibility curve – Opportunity Cost-Micro & Macro Economics
Meaning of Demand – Utility-Marginal Utility and Law of Diminishing Marginal Utility-Law of demand – Determinants of Demand – Changes in Demand – Market Demand—Demand, forecasting-Meaning of supply-Law of Supply- Changes in Supply– Market Price Determination – Implications of Government Price Fixation
Production function – Law of Variable proportion – Returns to scale – Iso-quants and Isocost line- Least cost combination of inputs – Cost concepts – Private cost and Social Cost –
Short run and Long run cost- cost curves – Revenue – Marginal, Average and Total Revenue-Break even Analysis.

MODULE – II

National Income concepts – GNP – GDP – NNP– Per Capita Income – Measurement of National Income-Output method- Income method and Expenditure method -Sectoral Contribution to GDP– Money-Static and Dynamic Functions of Money-Inflation – causes of inflation – measures to control inflation – Demand Pull inflation – cost push inflation – Effects of Inflation – Deflation.Global Economic Crisis India’s Economic crisis in 1991 – New economic policy – Liberalization – Privatization and Globalization-Multinational Corporations and their impacts on the Indian Economy- Foreign Direct Investment (FDI) Performance of India-Issues and Concerns. Industrial sector in India – Role of Industrialization -Industrial Policy Resolutions-Industry wise analysis – Electronics – Chemical – Automobile – Information Technology.Environment and Development – Basic Issues – Sustainable Development- Environmental Accounting – Growth versus Environment – The Global Environmental Issues- Poverty- Magnitude of Poverty in India- -Poverty and Environment.

PART-II- ACCOUNTANCY

MODULE – III

Book-Keeping and Accountancy- Elements of Double Entry- Book –Keeping-rules for journalizing-Ledger accounts-Cash book- Banking transactions- Trial Balance- Method of Balancing accounts-the journal proper(simple problems).
Final accounts: Preparation of trading and profit and loss Account- Balance sheet (with simple problems) – Introduction to accounting packages (Description only).

REFERENCE BOOKS :

a) Dewett K. K., Modern Economic Theory, S Chand and Co. Ltd., New Delhi, 2002.
b) Todaro M., Economic Development, Addison Wesley Longman Ltd., 1994.
c) Sharma M. K., Business Environment in India, Commonwealth Publishers, 2011.
d) Mithani D.M., Money, Banking, International Trade and Public Finance, Himalaya Publishing House, New Delhi, 2012.
e) Dutt R. and K. P. M. Sundaran, Indian Economy, S. Chand and Co. Ltd., New Delhi, 2002.
f) Varian H. R., Intermediate Micro Economics, W W Norton & Co. Inc., 2011.
g) Koutsoyiannis A., Modern Micro-economics, MacMillan, 2003.
h) Batliboi J. R., Double Entry Book-Keeping, Standard Accountancy Publ. Ltd., Bombay, 1989.
i) Chandrasekharan Nair K.G., A Systematic approach to Accounting, Chand Books, Trivandrum, 2010.

Internal Continuous Assessment

(Maximum Marks-50)
50% – Tests (minimum 2)
30% – Assignments (minimum 2) such as home work, problem solving, literature survey, seminar, term-project, software exercises, etc.
20% – Regularity in the class.

University Examination Pattern :

Examination duration: 3 hours Maximum Total Marks: 100
The question paper shall consist of 2 parts. Part I and Part II to be answered in separate answer books.

Part I Economics (70 marks) –
Part I shall consist of 2 parts.

Part A (20 Marks) – Two short answer questions of 10 marks each, covering entire syllabus. All questions are compulsory. (10×2=20marks).

Part B (50 marks) –
Candidates have to answer one full question out of the two from Part I (Module I and Module II). Each question carries 25 marks.

Part II Accountancy (30 marks)
Candidates have to answer two full questions out of the three from Part II (Module III). Each question carries 15 marks.

Course outcome :

The students will be acquainted with its basic concepts, terminology, principles and assumptions of Economics.It will help students for optimum or best use of resources of the country.It helps students to use the understanding of Economics of daily life.The students will get acquainted with the basics of book keeping and accounting.

3) DISCRETE STRUCTURES (FR)

Teaching Scheme: 2(L) – 1(T) – 0(P)                                                                
Credits : 3 points

Course Objectives :

To impart fundamentals of discrete mathematical structures useful in studying, analysing and solving problems in Computer Science.
To sharpen the mathematical skills by practicing problem solving, logical reasoning and writing precise proofs.To impart skills for applying ideas from discrete mathematics to real world problems.

MODULE – I

Statement calculus: Statements, connectives, statement formulas, truth tables, conditional, biconditional, well formed formulas, tautology, contradiction, equivalence of formulas, duality law, tautological implications, formulas with distinct truth tables, functionally complete set of connectives, two state devices and statement logic, Theory of inference for statement calculus, validity using truth tables, rules of inference, consistency of premises and indirect method of proof.
Predicate calculus: predicates, statement functions, variables and quantifiers, predicate formulas, free and bound variables, universe of discourse, theory of inference for predicate calculus.

MODULE – II

Set Theory: basic concepts of set theory, Representation of discrete structures. Relations and ordering : relations – properties of binary relations in a set, relation matrix and graph of a relation, Partition and covering of a set, equivalence relations, compatibility relations, composition of binary relations, Partial ordering, Partially ordered set representation.Functions: one to one, onto, bijection, composition of functions, inverse functions, binary and n-ary operations, natural numbers – Peano Axioms and Mathematical induction, Pigeon hole principle. Cardinality – countable and uncountable sets, Cantor’s theorem of power sets.

MODULE – III

Algebraic structures: simple algebraic systems and general properties, morphism, congruence relation, subalgebra, product algebra and factor algebra, semigroups & monoids – morphism, cyclic semi groups and monoids,subsemigroups and submonoids, groups – abelian groups, permutation groups, cyclic groups, subgroups and homomorphism, cosets and Lagrange’s theorem, normal subgroups. Algebraic systems with two binary operations – ring, integral domain, field.

MODULE – IV

Lattices: as partially ordered sets, properties of lattices, lattices as algebraic systems, sub lattices, direct product and homomorphism, Boolean algebra, subalgebra, direct product and homomorphism, Boolean functions. Graph theory – basic concepts, basic definitions of graphs, trees, paths, reachability and connectedness (No theorems and proofs for Graph theory topics).

REFERENCE BOOKS :
a) Tremblay J. P. and R. Manohar, Discrete Mathematical Structures with Applications to Computer Science, Tata McGraw-Hill, 1997.
b) Kolman B., Discrete Mathematical Structures for Computer Science, Prentice Hall, 1987.
c) Thomas Koshy, Discrete Mathematics with Applications, Elsevier, 2004.
d) Liu C. L., Elements of Discrete Mathematics, TMH, 2000.
e) Herstein I. N., Modern Algebra, John Wiley & Sons, 1999.
f) Gibbons A., Algorithmic Graph Theory, Cambridge University Press, 1985.
g) Rosen K. H., Discrete Mathematics and Its Applications with Combinatorics and Graph Theory, 6/e, Tata McGraw Hill, 2007.
h) Grimaldi R. P. and B.V. Ramana, Discrete and Combinatorial Mathematics-An Applied Introduction, 5/e, Pearson Education, 2008.

Internal Continuous Assessment

(Maximum Marks-50)
50% – Tests (minimum 2)
30% – Assignments (minimum 3) such as home work, problem solving, literature survey, seminar, term-project, software exercises, etc.
20% – Regularity in the class
University Examination Pattern:
Examination duration: 3 hours Maximum Total Marks: 100

The question paper shall consist of 2 parts.

Part A (20 marks) – Ten Short answer questions of 2 marks each. All questions are compulsory. There should be at least two questions from each module and not more than three questions from any module.

Part B (80 Marks) – Candidates have to answer one full question (question may contain sub-questions) out of the two from each module. Each question carries 20 marks.

Note : The question paper should contain at least 60% analytical/problem solving questions.

Course Outcome :

After successful completion of this course students would be able to:
understand the basic discrete mathematical structures used in various applications in Computer Science.Be conversant with the principles of valid reasoning and inference. Apply the concepts of Discrete Mathematics to various applications in Computer Science.

4) ELECTRONIC DEVICES AND CIRCUITS

Teaching Scheme: 2(L) – 1(T) – 0(P)                                                       
CREDITS : 3 points

Course Objectives:

Understand the operating principles of major electronic devices, circuit models and connection to the physical operation of devices.

MODULE – I

Introduction transistor biasing, fixed bias, self bias, voltage divider bias, effect of temperature on Q point, effect of bypass capacitor on biasing, RC coupled amplifier, factors affecting frequency response, multistage amplifiers, effect of cascading on bandwidth, CE-CE cascaded amplifier.
Feedback in amplifiers types, advantages of negative feedback, oscillators, RC phase shift oscillators, Wien bridge oscillators, Hartley and Colpitts oscillators.

MODULE – II

Pulse characteristics -Principle and working of RC differentiating circuit, RC integrating circuits, Clipping and clamping circuits based on diodes.
Introduction to regulated power supplies, classification, series voltage regulator, shunt regulator, current limiting techniques, IC regulator78XX, 79XX, LM317 regulator, dual IC power supplyLM340/LM320, SMPS, DC to DC conversion
Working of 555 IC, monostable and astable multivibrators using 555.

MODULE – III

Power amplifiers, classification, doubled ended amplifiers, class B pushpull amplifiers, crossover distortions.Operational amplifiers, characteristics, applications- summing, Schmitt trigger, clipper, clamper, precision rectifiers, astable and monostable multivibrators, active filters- first order and second order filters, simulated inductance filters.

MODULE – IV

Light dependent resistor ,phototransistor, photovoltaic cell, solar cell, seven segment display, intelligent display modules, LCD, principle of TFT, VDR, Laser diode, opto coupler.
MOSFET construction- enhancement type, threshold voltage, body effect, oxide thickness, depletion type, channel length modulation, CMOS –working.

REFERENCE BOOKS :

a) Bogart T. F., Electronic Devices Circuits, 6/e, Pearson, 2012.
b) Singh B. P. and R. Singh, Electronic Devices and Circuit, 2/e, Pearson, 2013.
c) Maini A. K. and V. Agrawal, Electronic Devices and Circuits, Wiley India, 2011.
d) Raju G. S. N., Electronic Devices and Circuits, IK International, 2012.
Malvino A and D. Bates, Electronic Principles, 7/e, TMH, 2010.
e) Khan A. A. and K. K. Dey, A First Course in Electronics, 3/e, PHI, 2012.

Internal Continuous Assessment

(Maximum Marks-50)
50% – Tests (minimum 2)
30% – Assignments (minimum 3) such as home work, problem solving, literature survey, seminar, term-project, software exercises, etc.
20% – Regularity in the class

University Examination Pattern:

Examination duration: 3 hours

Maximum Total Marks: 100
The question paper shall consist of 2 parts.

Part A (20 marks) – Ten Short answer questions of 2 marks each. All questions are compulsory. There should be at least two questions from each module and not more than three questions from any module.

Part B (80 Marks) – Candidates have to answer one full question (question may contain sub-questions) out of the two from each module. Each question (Descriptive/Analytical/Problem solving type) carries 20 marks.

Course Outcome:

At the end of this course, the student will be able to analyse the various electronic circuits using diodes, transistors and op-amps and understand the application of electronic devices in various fields.

5) DIGITAL SYSTEM DESIGN

Teaching Scheme: 2(L) – 2(T)– 0(P)                                                    
CREDITS : 4 points

Course Objectives :

To impart an understanding of the basic concepts of Boolean algebra and digital systems.Getting familiar with the design and implementation of different types of practically used sequential circuits.To provide an introduction to use Hardware Description Language.Pre-requisites: 13.109 Foundations of Computing and Programming in C (FR).

MODULE – I

Boolean algebra and logic gates : Introduction — Postulates of Boolean algebra – Canonical and Standard Forms — logic functions and gates – methods of minimization of logic functions — Karnaugh map method and tabulation method Product-of-Sums Simplification — Don’t-Care Conditions. Combinational Logic : combinational Circuits and design Procedure — binary adder and subtractor — multi—level NAND and NOR circuits — Exclusive-OR and Equivalence Functions.

MODULE – II

MSI and LSI implementation of combination logic : parallel adder, carry look ahead adder, BCD adder, code converter, magnitude comparator, decoder, multiplexer, de-multiplexer, parity generator Sequential logic circuits : latches and flip-flops – edge-triggering and level-triggering — RS, JK, D and T flip-flops — race condition — master-slave flip-flop Clocked sequential circuits : state diagram — state reduction and assignment — design with state equations Registers : registers with parallel load – shift registers universal shift registers – application: serial adder.

MODULE – III

Counters : asynchronous counters — binary and BCD ripple counters — timing sequences — synchronous counters — up-down counter, BCD counter, Johnson counter — timing sequences and state diagrams Memory and Programmable Logic : Random-Access Memory (RAM)—Memory Decoding—Error Detection and Correction — Read only Memory (ROM) — Programmable Logic Devices (PLD) — Programmable Array Logic (PAL), Programmable Logic Array (PLA). HDL: fundamentals, combinational logic, adder, multiplexer.

MODULE – IV

Arithmetic algorithms : algorithms for addition and subtraction of binary and BCD numbers — algorithms for multiplication and division of binary and BCD numbers — array multiplier —Booth’s multiplication algorithm — restoring and non-restoring division — algorithms for floating point addition, subtraction, multiplication and division.

REFERENCE BOOKS
a) Mano M. M., Digital Logic & Computer Design, 4/e, Pearson Education, 2013. [Chapters: 2, 3, 4.7, 4.8, 4.9, 5, 6, 7, 12.6]
b) Floyd T. L., Digital Fundamentals, 10/e, Pearson Education, 2009. [Chapters: 5, 6].
c) M. Morris Mano, Computer System Architecture, 3/e, Pearson Education, 2007. [Chapter 10].
d) Harris D. M. and, S. L. Harris, Digital Design and Computer Architecture, 2/e, Morgan Kaufmann Publishers, 2013 [Chapter 4.1, 4.2].
e) Tokheim R. L., Digital Electronics Principles and Applications, 7/e, Tata McGraw Hill, 2007.
f) Mano M. M. and M. D Ciletti, Digital Design, 4/e, Pearson Education, 2008.
g) Rajaraman V. and T. Radhakrishnan, An Introduction to Digital Computer Design, 5/e, Prentice Hall India Private Limited, 2012.
h) Tocci R. J., N. S. Widmer and G. L. Moss, Digital Systems, 10/e, Pearson Education, 2013.
i) Harris D. M. and S. L. Harris, Digital Design and Computer Architecture, 2/e, Morgan Kaufmann Publishers, 2013.

Internal Continuous Assessment

(Maximum Marks-50)
50% – Tests (minimum 2)
30% – Assignments (minimum 2) such as home work, problem solving, literature survey, seminar, term-project, software exercises, etc.
20% – Regularity in the class.

University Examination Pattern:

Examination duration: 3 hours Maximum Total Marks: 100
The question paper shall consist of 2 parts.

Part A (20 marks) – Ten Short answer questions of 2 marks each. All questions are compulsory. There should be at least two questions from each module and not more than three questions from any module.

Part B (80 Marks) – Candidates have to answer one full question (question may contain sub-questions) out of the two from each module. Each question (Descriptive/Analytical/Problem solving type) carries 20 marks.

Course Outcome:

After successful completion of this course, students will be able to
Study courses in higher semesters which includes organization of digital systems and hardware design.Design and implement different types of practically used combinational and sequential circuits.Use Hardware Description language for defining simple logic circuits.

6) DATA STRUCTURES AND ALGORITHMS

Teaching Scheme: 2(L) –2(T) – 0(P)
                                                    CREDITS : 4 POINTS

Course Objectives :

To learn basic concepts programming methodologies and analysis of algorithms.To learn concepts of various data structures such as stack, queue, priority queue, strings, trees and graphs.To acquire knowledge on various sorting techniques.To develop the skill to choose the most appropriate data structures for solving a given problem.

MODULE I

Introduction to programming methodologies – structured approach, stepwise refinement techniques, programming style, documentation – analysis of algorithms: frequency count, definition of Big O notation.
Study of basic data structures – vectors, arrays, linked lists:- singly linked list, doubly linked list, Circular linked list , operations on linked list , linked list with header nodes, applications of linked list.

MODULE II

Implementation of Stacks and Queues using arrays and linked list, DEQUEUE (double ended queue). Multiple Stacks and Queues, Applications of stack.
String: – representation of string, concatenation, substring searching and deletion.
Trees: – m-ary tree, Binary tree – level and height of the tree, complete-binary tree representation using array, tree traversals, applications.
Binary search tree – creation, insertion and deletion operations, applications.
Graphs – representation of graphs, applications (Algorithms for graph traversal not included).

MODULE III

Memory management: – reference count, garbage collection algorithm-algorithm for marking accessible cells. Fragmentation and compaction-first fit, best fit, buddy system, boundary tag method.

MODULE IV

Sorting techniques – Insertion sort, Merge sort, Partition- Exchange sort (Quick Sort), Heap sort.
Searching algorithms – Linear and Binary search. Hash Tables – Hashing functions – Midsquare, division, folding, digit analysis, Overflow handling.

REFERENCE BOOKS :

a) Horowitz E. and S. Sahni, Fundamentals of Data Structures, Galgotia, 1999.
b) Aho A. V., J. E. Hopcroft and J. D. Ullman, Data Structures and Algorithms, Pearson Publication,1983.
c) Samanta D., Classic Data Structures, Prentice Hall India, 2/e, 2009.
d) Tremblay J. P. and P. G. Sorenson, Introduction to Data Structures with Applications, Tata McGraw Hill, 1995.
e) Lipschuts S., Theory and Problems of Data Structures, Schaum’s Series, 1986.
f) Horwitz E., S. Sahni and S. Anderson, Fundamentals of Data Structures in C, University Press (India), 2008.
g) Wirth N., Algorithms + Data Structures = Programs, Prentice Hall, 2004.
h) Hugges J. K. and J. I. Michtm, A Structured Approach to Programming, PHI, 1987.

Internal Continuous Assessment

(Maximum Marks-50)
50% – Tests (minimum 2)
30% – Assignments (minimum 2) such as home work, problem solving, literature survey, seminar, term-project, software exercises, etc.
20% – Regularity in the classes.

University Examination Pattern:

Examination duration: 3 hours Maximum Total Marks: 100
The question paper shall consist of 2 parts.

Part A (20 marks) – Ten Short answer questions of 2 marks each. All questions are compulsory. There should be at least two questions from each module and not more than three questions from any module.

Part B (80 Marks) – Candidates have to answer one full question (question may contain sub-questions) out of the two from each module. Each question (Descriptive/Analytical/Problem solving type) carries 20 marks.

Course Outcome:

After successful completion of this course, students will be able to
Interpret and compute asymptotic notations of an algorithm to analyze the consumption of resources (time/space).Implement stack, queue, list and tree ADT to manage the memory using static and dynamic allocations.Develop and compare the searching and sorting algorithms.Identify appropriate data structure and algorithm for a given problem and implement in any programming language.

7) ELECTRONICS CIRCUITS LAB

Teaching Scheme: 0(L) – 0(T)– 4(P)                                                  
CREDITS : 4 POINTS

Course Objective:

To enable students to have the practical knowledge of different electronic devices and circuits and to study the specifications of devices and circuits.

List of Practicals:

a) Characteristics of diode, zener diode.
b) CE characteristics of BJT.
c) CE Characteristics of FET.
d) Rectifier circuits with and without filters.
e) RC low pass and high pass circuits.
f) Differentiating and integrating circuits.
g) Clipping and clamping circuits.
h) Simple zener diode regulator.
i) RC coupled amplifier using BJT.
j) RC phase shift oscillator using BJT.
k) Astable and Monostable multivibrators using 555 Timer IC.
l) Astable and Monostable multivibrators using 741 OPAMP.
m) Voltage regulator using 78XX and 317.

Internal Continuous Assessment

(Maximum Marks-50)
40% – Test/s (minimum 1)
40% – Class work and Record (Up-to-date lab work, problem solving capability, keeping track of rough record and fair record, term projects, assignment- software/ hardware exercises, etc)
20% – Regularity in the class.

University Examination Pattern:

Examination duration: 3 hours Maximum Total Marks: 100

18 Questions based on the entire syllabus given above.
Marks should be awarded as follows:
25% – Circuit Design
15% – Performance (Wiring, usage of equipment and trouble shooting)
35% – Result
25% – Viva voce
Candidate shall submit the certified fair record for endorsement by the external examiner.
Course Outcome:

On successful completion of this course, student will understand the working of electronic devices with their characteristics and the typical specifications of semiconductor devices and circuits.

8) PROGRAMMING LAB

Teaching Scheme: 0(L) – 0(T) –4(P)                                                
CREDITS : 4 POINTS

Course Objective:

To implement algorithms studied in the course Foundations of Computing and Programming in C language.
To learn the implementation of control structures, Iterations and recursive functions.
To implement operations on different types of files.
To implement basic Data Structures.

List of Exercises:

Introduction: Familiarization of operating systems like DOS and Windows.
Programming exercises in C based on the course 13.109 Foundations of Computing and Programming in C. The exercises may include the following Programs using –
1. Decision making, branching and looping
– if, if else statements
– switch, goto statements
– while, do, for statements
2. Arrays and strings
– one-dimensional, two-dimensional, multidimensional arrays
– reading/writing strings
– operations on strings
– string handling
3. Functions
– user defined functions
– function calls, arguments & return values
– nesting of functions
– recursive functions
– passing arrays and strings to functions
4. Structures and unions
– copying and comparing structure variables
– arrays of structures
– arrays within structures
– structures with in structures
– structures and functions
unions
5. Pointers
– pointers and arrays
– pointers and character strings
– array of pointers
– pointers and functions
– pointers and structures
6. Files, memory allocation, bit-level programming
– files – defining, opening/closing, input-output operations
– command line arguments
– memory allocation functions
– bit-wise operators
7. Basic Data structures
8. Implementation of stack and Queue using array.

Internal Continuous Assessment

(Maximum Marks-50)
40% – Test/s (minimum 1)
40% – Class work and Record (Up-to-date lab work, problem solving capability, keeping track of rough record and fair record, term projects, assignment- software/ hardware exercises, etc)
20% – Regularity in the class

University Examination Pattern:

Examination duration: 3 hours Maximum Total Marks: 100
Questions based on the entire syllabus given above.
Marks should be awarded as follows:
20% – Algorithm/Design
30% – Performance (Implementing the work/Conducting the experiment)
25% – Output/Results and inference
25% – Viva voce
Candidate shall submit the certified fair record for endorsement by the external examiner.

Course Outcome:

After successful completion of this course, students will be capable of
Selecting appropriate control structures suitable for the given problem.Implementing algorithms for searching and sorting.Developing algorithm and implementing it using C programming language for a given problem.Creating and processing data stored in files.


P.S :This is the kerala university b.tech syllabus for Computer Science. The final syllabus of KTU will be finalised only after the workshop of teachers on 14th. :)

SUMMER TRAINING COURSES / INTERNSHIP UNDER KTU

1) What is Internship under KTU?

The  students  shall  carry  out  internship  or  training  in  industries  during  the semester  breaks.The  students  along  with  the  faculty  can  identify  nearby industries  or  work  sites  and  undergo  training. The  industry  can  be  even  small industries. The  attachment  of  the  students  in  such  industries  with  the  active participation  of  faculty  can  be  mutually  beneficial  as  the  faculty  and  students can  also  get  the  training  as  well  as  suggest  schemes to modernise  and innovate the process and systems.

2) When should I do my Internship?

The  students  will  get  about  two months  gap  from  the  end  of  examination  and  start  of  next  semester classes which has to  utilised for Summer Training  Courses or Internships.As  per  the  revised  academic  calendar  S2  Classes will end on  5th  May,  2016  and S3  classes  will  start  on  1st  August,  2016. Regular  University  Examination  is scheduled  from  May  20  to  1st June, 2016.

3) I will be busy with my Supplementary Exams of S1 and S2 during these 2 months alloted for Internship. What will i do in such a situation?

Internship or summer training courses are meant for students who have successfully cleared all subjects in S1. Since, most of the students have papers lagging behind, they cannot do their Internships now. No need to worry. They will have to find some other time for this in the next year.
According to KTU circular, "The  internship  activities  are  not  limited  to  students  who  passed  in  all  subjects, but  to  students  who  are  willing  to  build  their  career  associating  with  industries from first  year of their studies onwards." They dont have to worry about their Internships.

4) Why should I do my Internship?

We all know that, in order to successfully complete B.tech under KTU, we need to collect minimum number of credit points that is 100 credit points through various activities like NSS,ED CLUB, Sports,Arts,Internships,etc. For an Industrial visit-10 points.
5 day Industrial training - 20 points.
NSS & ED - 70 points and so on for various activities.

5) Where to do my Internship?

Just go as a trainee in any Industry related to your branch for 5 days . Submit a small report about the work you did there to that Industry Officials. Then you will get a certificate from the concerned Industry official which you have to submit at the college to get Grace Points/Credits.

INTERSHIP Activities in different Colleges under KTU

1) AMAL JYOTHI COLLEGE OF ENGINEERING

BRANCH - Electrical and Electronics

INTERNSHIP ACTIVITIES

a. Newage Elevators,  Ernakulam
b. Metcon Steels, Perumbavoor
c. KSEB, Muttom
d. Guardian Controls, Thodupuzha
e. Nadukkara Agro  Processing    Coop, Vazhakulam
f. St. Mary’s Latex, Kanjirapally

2) COLLEGE OF ENGINEERING PERUMON

BRANCH - MECHANICAL ENGINEERING

INTERNSHIP ACTIVITIES

The  Kerala  Minerals  and  Metals Limited  for  1  week  by  15  students. Areas  of  studies  are  Various process  of  separation  of  ore  from the minerals,  Fire  and  safety requirement  in  industries.    Three units  are    Mineral  separation  plant, Titanium pigment  plant  and Titanium sponge plant .

3) COLLEGE OF ENGINEERING TRIKARIPUR

BRANCH - ELECTRICAL AND ELECTRONICS

INTERNSHIP ACTIVITIES

AIPCT  Kochi  Campus  for  ten  days internship programme.

4) ILM COLLEGE OF ENGINEERING  & TECHNOLOGY

BRANCH - MECHANICAL & AERONAUTICAL

INTERNSHIP ACTIVITIES

Nine days  internship  programme  by   Rinine  Engineering  Pvt.  Ltd,  TBI Rajiv Gandhi Institute Technology,  Kottayam.

5) MUTHOOT INSTITUTE OF TECHNOLOGY  AND SCIENCE  (MITS)

BRANCH - CIVIL

INTERNSHIP ACTIVITIES

Four  of  Civil  Engg.  students  (Delbin Benny,  Chandraj S,  Bovas Benny,   Muhammed  Aslam  P  S)  had participated in CIVIL the  'Agrineer' competition held  at IIT  Madras  as  a part  of  'Shaastra  2016'  and  won the  first  prize.  Those  students  are selected  for  the  internship  by  the Engineering  Design  Department  of IIT  Madras. Rest please consult the concerned faculty.

6) SCT COLLEGE  OF ENGINEERING, PAPPANAMCODE

BRANCH - COMPUTER SCIENCE

INTERNSHIP ACTIVITIES

Industrial  Training  in  collaboration with C-DAC, Bridge  Course  on  C  Programming (30 hours)

7) SCMS SCHOOL OF ENGINEERING AND TECHNOLOGY

BRANCH - CIVIL

INTERNSHIP ACTIVITIES

Main  Project  Title:  Environmental Status Assessment  for  Kochi Municipal  Corporation  for  students of Civil  Engineering. (In collaboration  with  Kochi  Municipal Corporation) Activity  for  Internship:  Mapping  of ground  water  resources  in  Kochi Corporation Area.

8) SNGIST GROUP OF INSTITUTIONS

BRANCHES - CIVIL

INTERNSHIP ACTIVITIES

KMRL  Ltd  Kochi,   Noel  builders Kakkanad, Mary Matha constructions  Kakkanad,  Sky  line builders, Ernakulam.

P.S : I will update the college  list as soon as I get the complete list. :)

Monday 6 June 2016

INTRODUCTION TO KTU

APJ Abdul Kalam Technological University ( Kerala Technological University) , a State Government University came into existence on May 21, 2014 with an aim to give leadership to the technology related policy formulation and Engineering Planning for the State. It also emphaziess to improve the academic standards of the Graduate, Poet Graduate and Research Programmes in Engineering Science and Technology to regulate the academic standards of all colleges affiliated to the University. The main thrust areas of the University are Research,Development and Innovation.
( വെറും വാഗ് ദാനങ്ങൾ മാത്രം 😂)